1. Field of Invention
The invention is related to a controller management for a nonvolatile memory. Particularly, the present invention is related to a controller management for a big block nonvolatile memory.
2. Description of Related Art
Nonvolatile memory chips, which include nonvolatile memory arrays, have various applications for storing digital information. One such application is for storage of large amounts of digital information for use by digital cameras, as replacements for hard disk within personal computer (PCs) and so forth. Nonvolatile memory arrays are comprised of various types of memory cells, such as NOR, NAND and other types of structures known to those of ordinary skill in the art that have the characteristic of maintaining information stored therein while power is disconnected or disrupted.
FIG. 1 is a block diagram, schematically illustrating architecture of flash memory card. In FIG. 1, the host 100 can access data stored in a flash disk 102, in which the flash disk 102 includes a control unit 104 and a memory unit 106. A memory unit may include one or more memory chips. In access operation, the host 100 usually accesses the data in the memory module 106 via the control unit 104 at the requested address. In addition to communicating with the host, the control unit 104 also takes responsibility of managing the memory unit 106. The flash memory storage device is then configured as a drive by the host. FIG. 2 is a mapping table maintained by the control unit. From the host side, such a drive includes a plurality of logical blocks 108 arranged in the control unit 104, each of which can be addressed by the host. Namely, the host can access all the logical space including logical block 0, logical block 1, and logical block M−1.
A flash memory chip generally is divided into a plurality of storage units, like blocks which include one or more sectors. As shown in FIG. 2, the physical space of the flash memory module includes physical block 0, physical block 1, . . . , and physical block N−1. The logical space used by the host is always less than the physical space because some of the physical blocks may be defective or used by the controller for managing the flash memory module. One task of the controller is to create the logical space for host access. Indeed, the host can not directly address the physical space so that the controller must maintain the mapping relations between the logical blocks and the physical blocks. Such a mapping information is usually called as a mapping table and can be stored in the specific physical blocks or loaded into the SRAM within the controller. If a host asks for reading a particular logical block, the controller will look up the mapping table for identifying which physical block to be accessed, transfer data from the physical block to itself, and then transfer data from itself to the host.
FIG. 3A is a drawing, schematically illustrating the conventional mapping architecture. The data block and the writing block are formed and managed by the control unit. Each of them includes at least one physical block. In FIG. 3A, the logical block 300 is used by the host to write a data into the data block 302. However, since the overhead occurs from erase-then-program architecture, when the data will be re-written into the data block 302, the data is temporarily written to a writing block 304, instead. The writing block 304 also, functions as a buffer block or a spare block in the memory device. In other words, the writing block 304 in the usual accessing operation for the flash memory is severing as a buffer block for the host to write data instead of directly writing into the data block. The function of the data block is to store original data and the writing block is used as a temporary storage for the current write request from the host. When the writing block 304 is, for example, fully written, then a swap action between the data block 302 and the writing block 304 is necessary. FIG. 3B is a drawing, schematically illustrating how to recycle these blocks. The swap operation generally means that the writing block is newly allocated as a data block to take the role of the previously allocated data block. However, the replaced data block can be considered as an old block so that the old data block is erased and then becomes a spare block. The spare block can be recycled and then be allocated out to server as a current writing block if the control unit needs such a writing block for the host in responding to a write request.
Corresponding to the data block or the writing block, a sector structure is shown in FIG. 4. In one sector, it usually includes a data area 400, such as a size of 512 byte, and an extra area 402, which may include the information of logical block number, system flag, error correction code (Ecc), and so on. FIG. 5 is a drawing, schematically illustrating the mapping relation between the logical block 300, the data (D) block 302 and the spare (S) block 304. The spare block 304 can be allocated as the writing (W) block later. In FIG. 5, the logical block No. 0 maps to the data block 302 whose physical Block number is 5, and the spare block 304 is located at physical block No. 200h. The mapping table is divided into the logical area and the physical area. For example, the first row shows that the logical block No. 0 is corresponding to the data block No. 5, and the spare block No. 200h can be allocated to become a writing block for any one data block. If the host asks for writing sector LBA0 now, the spare block will be allocated to become a writing (W) block, as shown in FIG. 6. Moreover, a sector LBA0 will be written into the first position in the writing block. Now, the field for the first empty sector is filled by 1, which means that the first sector of the empty sectors in the writing block 304 is starting at offset 1 for storing LBA 1.
FIG. 7 is a drawing, schematically illustrating a data mapping relation after a swap action. Referring to FIG. 6, if the sector LBA0 is to be written again, a swap action is necessary in the conventional method. Because of the flash characteristic, data cannot be directly written into the writing block 304 whose physical block No. is 200h, so that a swap operation is needed. The swap operation causes time-consuming and reduces the system performance. In the swap operation, all the sectors except LBA 0 in data block must be moved to the currently-allocated writing block, and then the original data block (physical No. 5) will be erased so that the current writing block (physical No. 200) becomes the data block, as in FIG. 7. After swap operation, it still needs a writing block for the LBA 0 in write operation. The just erased physical block No. 5 can be used as the current writing block. Also, the other spare block can alternatively be used as the current writing block. Eventually, the LBA 0 data will be written into the current writing block and the mapping table should be updated, as shown in FIG. 7. Here, this kind of situation for writing is called a random write.
FIG. 8 is a drawing, schematically illustrating the access sequence in the conventional method. After writing to the LBA0, as shown in FIG. 6, the host requests to write LBA1. The controller will directly write LBA1 into the next page of 512+16 bytes. Such kind of host side in sequential write will not result in a random write in flash memory side.
FIG. 9 is a drawing, schematically illustrating the block structure of a new-type flash memory having large blocks. For this type of large block flash memory, usually, one block 500 includes, for example, 64 pages, and each page has four sectors by a size of 2048+64 bytes. Page is the basic unit to be programmed. The writing sequence is similar to the small size flash memory. FIG. 10 is a drawing, schematically illustrating the writing procedure for the large block flash memory. In FIG. 10, the logical block 600 has 64 logical pages, and each logical page has four logical sectors; each logical sector size is 512 bytes for storing user data. Likewise, the data block 602 and the writing (W) block 604 have 64 pages, and each page has four sectors; each sector size is 528 bytes for storing user data and extra data. The arrangement is similar to the small size flash memory except block size and page size. When the host requests to write to sector LBA0, then the controller will program entire page0 due to page-based programming operation. Thereby, the original sectors LBA1–LBA3 will be transferred from the D block 602 into the controller, and then host data LBA0 accompanying with LBA1–LBA3 are together written into page 0 of the W block 304. The mapping table stores the status after programming. The empty pointer indicates offset 1 of the W block 604 is the first blank page.
When the host requests to write to sector LBA1, then the controller has to program page 0 again, since the sector LBA1 is a part of the page 0 for the large block. In this situation, a swap operation occurs for this write operation. In FIG. 11, the swap operation is performed between the data block 5 and the W block 200h, in comparison with FIG. 10.
As previously discussed, the swap operation will reduce the operation speed. However, the conventional management method between the logical block 600, data block 602, and the W block 604 causes the swap operation rather often for the large block flash memory. If the occurrence of swap operation can be reduced, the operation speed certainly can be improved.